ShaderLayout

Remarks

SPIR-V has no implicit layout: every block member carries an explicit Offset, every array an ArrayStride and every matrix a MatrixStride. The host writing that buffer has to agree with all of them, and so does GLSL's std140/std430.

So there is exactly one implementation and everything reads it — the SPIR-V decorations, the reflection the engine writes constant buffers from, and the tests that pin the numbers. A second copy is how backends come to disagree about float3 padding, which is the failure this file exists to prevent.

Matrices are stored column-major, matching GLSL's default inside a laid-out block and the ColMajor decoration the SPIR-V backend writes. An R×C matrix is C columns of R components, so MatrixStride is the gap between columns.

Methods (5)

• public static int Alignment(IrType type, LayoutRule rule = Std140)

  Alignment in bytes for a member of a block laid out under .

• public static int Size(IrType type, LayoutRule rule = Std140)

  Bytes occupied, which for a vec3 is 12 even though it aligns to 16.

• public static int MatrixStride(IrMatrixType matrix, LayoutRule rule = Std140)

  The gap between consecutive matrix columns. A column is a vector of Rows components, so this follows the same rule an array of those vectors would.

• public static int ArrayStride(IrArrayType array, LayoutRule rule = Std140)

  The gap between consecutive array elements.

• public static (int[] Offsets, int Size) Members(IReadOnlyList<IrType> members, LayoutRule rule = Std140)

  Byte offsets for a run of members laid out in order, plus the block's total size.

Used by (8)

• Int64TestsVixen.Raven.Tests
• LowererVixen.Raven
• ReflectionBuilderVixen.Raven
• ReflectionTestsVixen.Raven.Tests
• ShaderLayoutTestsVixen.Raven.Tests
• SpirvEmitterVixen.Raven
• SpirvTypesVixen.Raven
• WritableResourceTestsVixen.Raven.Tests